Generally, various semiconductor fabrication processes can be performed on a wafer to form a plurality of semiconductor chips. In order to form a semiconductor package, a plurality of the semiconductor chips can be mounted on a printed circuit board (PCB), and then a packaging process can be performed to form a semiconductor package.
In order to increase storage capacity of the semiconductor package, a multi-chip package having sequentially stacked semiconductor chips cancan be formed. The stacked semiconductor chips can be electrically connected with each other using conductive wires. When the conductive wires can have defects caused by faults of a wire bonding machine, the semiconductor chips can be disconnected, or otherwise not properly connected. Thus, testing the conductive wires can be necessary.
The conductive wires of the multi-chip package can be classified into first conductive wires connected between adjacent upper and lower semiconductor chips, second conductive wires connected between an uppermost semiconductor chip and a package substrate, etc. The first conductive wires and the second conductive wires can have different electrical connecting functions. Therefore, it can be required to setting different operation algorithms in the wire bonding machine with respect to the first conductive wires and the second conductive wires.
According to related arts, the wire bonding machine in which a single operation algorithm can be set can form the conductive wires having different electrical connecting functions. For example, when the operation algorithm includes a current passing through the conductive wires, a wide single range can be set as an allowable range of the current, regardless of the different electrical connection functions.
Therefore, although an allowable current range of an abnormal conductive wire can be very low in view of the electrical connecting functions, the single operation algorithm of the wire bonding machine, which can form the abnormal conductive wire, can be determined to be normal due to the wide allowable current range. In a final test of the multi-chip package, the multi-chip package can be finally determined to be abnormal due to the abnormal conductive wire. As a result, a multi-chip package manufactured at a high cost may have to be discarded.